SystemVerilog DPI testbench does not support multiple clocks. To avoid this error, change HDL code generation option "cl

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mamorani
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SystemVerilog DPI testbench does not support multiple clocks. To avoid this error, change HDL code generation option "cl

Post by mamorani »

SystemVerilog DPI testbench does not support multiple clocks. To avoid this error, change HDL code generation option "clock input" to "single

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