This model-reference block is inhibiting clock-rate pipelining. Consider converting it to a subsystem and then turn on F

Post Reply
mamorani
Posts: 8800
Joined: Thu Feb 25, 2021 6:50 pm
Contact:

This model-reference block is inhibiting clock-rate pipelining. Consider converting it to a subsystem and then turn on F

Post by mamorani »

This model-reference block is inhibiting clock-rate pipelining. Consider converting it to a subsystem and then turn on FlattenHierarchy option on it

optimization
Post Reply

Return to “Signal Processing”

Who is online

Users browsing this forum: No registered users and 9 guests