You can generate MATLAB code that will automate the generation of synthesizable VHDL and Verilog code along with test be

[mamorani]

You can generate MATLAB code that will automate the generation of synthesizable VHDL and Verilog code along with test benches for fixed-point filters. Go to the ''Targets'' menu and select ''Generate HDL'' then check ''Generate MATLAB code'

fdatooltip