![CDATA[ Complexity mismatch. Complexity of <sldiag objui="inport" objparam=" ,number,integer}" objname=" ">input port

[mamorani]

![CDATA[ Complexity mismatch. Complexity of <sldiag objui="inport" objparam=" ,number,integer}" objname=" ">input port {0,number,integer}</sldiag> and output port of block '' '' should be the same. If input port is complex then output port should be complex. If input port is real then output port should be real.
ArithShift