Xilinx Archives — MATLAB Number ONE https://matlab1.com/tag/xilinx/ MATLAB Simulink | Tutorial | Code | Project Sun, 19 Aug 2018 07:48:02 +0000 en-GB hourly 1 https://matlab1.com/wp-content/uploads/2018/08/icon1-100x100.png Xilinx Archives — MATLAB Number ONE https://matlab1.com/tag/xilinx/ 32 32 Discussion About Architecture Design For A Neural Spike-Based Data Reduction Platform https://matlab1.com/discussion-architecture-design-neural-spike-based-data-reduction-platform/ https://matlab1.com/discussion-architecture-design-neural-spike-based-data-reduction-platform/#respond Sun, 12 Nov 2017 10:52:12 +0000 https://matlab1.com/?p=2806 The research presented in this dissertation was motivated by a long term goal of monitoring the electrical activity of thousands of neurons, in an effort to decipher the brain activity. Recording thousands of neural signals may provide some insight in what Santiago Ramón y Cajal, the father of modern neuroscience, called “the impenetrable jungle where […]

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]]> https://matlab1.com/discussion-architecture-design-neural-spike-based-data-reduction-platform/feed/ 0 Xillybus IP core Implementation https://matlab1.com/xillybus-ip-core-implementation/ https://matlab1.com/xillybus-ip-core-implementation/#respond Sat, 11 Nov 2017 16:58:30 +0000 https://matlab1.com/?p=2673 The Xillybus IP core was implemented on a Virtex-5 FPGA on a Xilinx xupv5lx110t board. The core ports were connected to ChipScope integrated logic analyzer for on-chip testing. Before integrating the Xillybus IP core into the spike-based data reduction platform, its performance was first tested by transmitting predefined data read from a ROM on the […]

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