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HDL support is not available for the reset input port

Last post by omidrostaei « Sun Mar 14, 2021 5:28 pm

by omidrostaei » Sun Mar 14, 2021 5:28 pm

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703 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:28 pm
HDL support requires the state metric word length to be at least bits

Last post by omidrostaei « Sun Mar 14, 2021 5:28 pm

by omidrostaei » Sun Mar 14, 2021 5:28 pm

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514 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:28 pm
HDL support requires the reset signal to be boolean

Last post by omidrostaei « Sun Mar 14, 2021 5:28 pm

by omidrostaei » Sun Mar 14, 2021 5:28 pm

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462 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:28 pm
HDL support is not available for the erasures input port

Last post by omidrostaei « Sun Mar 14, 2021 5:27 pm

by omidrostaei » Sun Mar 14, 2021 5:27 pm

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556 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:27 pm
HDL support is not available for the Truncated operation mode HDL support is not available for the Terminated operation

Last post by omidrostaei « Sun Mar 14, 2021 5:25 pm

by omidrostaei » Sun Mar 14, 2021 5:25 pm

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566 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:25 pm
HDL support requires the traceback depth to be greater than or equal to the constraint length

Last post by omidrostaei « Sun Mar 14, 2021 5:25 pm

by omidrostaei » Sun Mar 14, 2021 5:25 pm

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543 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:25 pm
The generated HDL output has a delay of samples with respect to the original Viterbi Decoder output.

Last post by omidrostaei « Sun Mar 14, 2021 5:24 pm

by omidrostaei » Sun Mar 14, 2021 5:24 pm

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542 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:24 pm
HDL support requires that the reset action be delayed to the next time step. This will lead to a synchronous reset in th

Last post by omidrostaei « Sun Mar 14, 2021 5:24 pm

by omidrostaei » Sun Mar 14, 2021 5:24 pm

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530 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:24 pm
HDL support requires the input port word length to be equal to the number of soft decision bits.

Last post by omidrostaei « Sun Mar 14, 2021 5:23 pm

by omidrostaei » Sun Mar 14, 2021 5:23 pm

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614 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:23 pm
HDL support requires a constraint length between 3 and 9

Last post by omidrostaei « Sun Mar 14, 2021 5:23 pm

by omidrostaei » Sun Mar 14, 2021 5:23 pm

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554 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:23 pm
The state metric word length has been set to bits in the HDL code

Last post by omidrostaei « Sun Mar 14, 2021 5:23 pm

by omidrostaei » Sun Mar 14, 2021 5:23 pm

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555 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:23 pm
The state metric word length has been set to bits in the HDL code

Last post by omidrostaei « Sun Mar 14, 2021 5:23 pm

by omidrostaei » Sun Mar 14, 2021 5:23 pm

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571 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:23 pm
HDL support is not available for the Unquantized Decision type

Last post by omidrostaei « Sun Mar 14, 2021 5:22 pm

by omidrostaei » Sun Mar 14, 2021 5:22 pm

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541 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:22 pm
HDL support is not available for Signed input data types

Last post by omidrostaei « Sun Mar 14, 2021 5:22 pm

by omidrostaei » Sun Mar 14, 2021 5:22 pm

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631 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:22 pm
HDL support is not available for Double/Single input data types

Last post by omidrostaei « Sun Mar 14, 2021 5:22 pm

by omidrostaei » Sun Mar 14, 2021 5:22 pm

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537 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:22 pm
HDL support requires a decoding rate from 1/2 to 1/7

Last post by omidrostaei « Sun Mar 14, 2021 5:21 pm

by omidrostaei » Sun Mar 14, 2021 5:21 pm

0 Replies

578 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:21 pm
Default value of TracebackStagesPerPipeline is set to 4

Last post by omidrostaei « Sun Mar 14, 2021 5:21 pm

by omidrostaei » Sun Mar 14, 2021 5:21 pm

0 Replies

533 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:21 pm
Default value of TracebackStagesPerPipeline is set to 4

Last post by omidrostaei « Sun Mar 14, 2021 5:21 pm

by omidrostaei » Sun Mar 14, 2021 5:21 pm

0 Replies

570 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:21 pm
TracebackStagesPerPipeline must be a positive integer

Last post by omidrostaei « Sun Mar 14, 2021 5:21 pm

by omidrostaei » Sun Mar 14, 2021 5:21 pm

0 Replies

600 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:21 pm
Double and Single data types are not supported for HDL code generation.

Last post by omidrostaei « Sun Mar 14, 2021 5:19 pm

by omidrostaei » Sun Mar 14, 2021 5:19 pm

0 Replies

524 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:19 pm
HDL code generation is not supported for input types other than boolean or ufix1 when the Input Type is set to Bit.

Last post by omidrostaei « Sun Mar 14, 2021 5:19 pm

by omidrostaei » Sun Mar 14, 2021 5:19 pm

0 Replies

584 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:19 pm
Double and Single data types are not supported for HDL code generation.

Last post by omidrostaei « Sun Mar 14, 2021 5:18 pm

by omidrostaei » Sun Mar 14, 2021 5:18 pm

0 Replies

674 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:18 pm
Double and Single data types are not supported for HDL code generation.

Last post by omidrostaei « Sun Mar 14, 2021 5:18 pm

by omidrostaei » Sun Mar 14, 2021 5:18 pm

0 Replies

592 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:18 pm
The Rectangular QAM Demodulator block only supports Phase offsets which are a multiple of pi/2 for HDL code generation.

Last post by omidrostaei « Sun Mar 14, 2021 5:18 pm

by omidrostaei » Sun Mar 14, 2021 5:18 pm

0 Replies

501 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:18 pm
HDL code generation only supports the Normalization Method of Minimum distance between symbols with a Minimum Distance o

Last post by omidrostaei « Sun Mar 14, 2021 5:17 pm

by omidrostaei » Sun Mar 14, 2021 5:17 pm

0 Replies

516 Views

Last post by omidrostaei
Sun Mar 14, 2021 5:17 pm

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