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Missing property name or value, See help vsim for PV pair information

Last post by mamorani « Sun Mar 14, 2021 12:18 pm

by mamorani » Sun Mar 14, 2021 12:18 pm

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324 Views

Last post by mamorani
Sun Mar 14, 2021 12:18 pm
The name of the DUT model must match the name of the model reference block in the test harness

Last post by mamorani « Sun Mar 14, 2021 12:17 pm

by mamorani » Sun Mar 14, 2021 12:17 pm

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297 Views

Last post by mamorani
Sun Mar 14, 2021 12:17 pm
The fundamental sample time of subsystem denoted as UVM '' is this is not equal to the fundamental sample time of sub

Last post by mamorani « Sun Mar 14, 2021 12:17 pm

by mamorani » Sun Mar 14, 2021 12:17 pm

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334 Views

Last post by mamorani
Sun Mar 14, 2021 12:17 pm
Invalid Simulink to UVM topology mapping was detected. The following issues were found:

Last post by mamorani « Sun Mar 14, 2021 12:16 pm

by mamorani » Sun Mar 14, 2021 12:16 pm

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348 Views

Last post by mamorani
Sun Mar 14, 2021 12:16 pm
The input port number from the ''sequence'' subsystem has minimum and\\or maximum constraints that will be ignored. Onl

Last post by mamorani « Sun Mar 14, 2021 12:16 pm

by mamorani » Sun Mar 14, 2021 12:16 pm

0 Replies

331 Views

Last post by mamorani
Sun Mar 14, 2021 12:16 pm
Invalid configuration parameters were found. Follow the action below to fix the error. <![CDATA[ <actions exclusiveFixIt

Last post by mamorani « Sun Mar 14, 2021 12:15 pm

by mamorani » Sun Mar 14, 2021 12:15 pm

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319 Views

Last post by mamorani
Sun Mar 14, 2021 12:15 pm
The timescale specified is invalid. The timescale has to be a character vector or string specifying the time units and t

Last post by mamorani « Sun Mar 14, 2021 12:14 pm

by mamorani » Sun Mar 14, 2021 12:14 pm

0 Replies

328 Views

Last post by mamorani
Sun Mar 14, 2021 12:14 pm
The UVM configuration object is not valid. Use the command ''uvmcodegen.config()'' to create a UVM configuration object

Last post by mamorani « Sun Mar 14, 2021 12:14 pm

by mamorani » Sun Mar 14, 2021 12:14 pm

0 Replies

333 Views

Last post by mamorani
Sun Mar 14, 2021 12:14 pm
Virtual connectivity ports are not supported. The following ''Goto'' and ''From'' blocks were found: Replace these ports

Last post by mamorani « Sun Mar 14, 2021 12:14 pm

by mamorani » Sun Mar 14, 2021 12:14 pm

0 Replies

310 Views

Last post by mamorani
Sun Mar 14, 2021 12:14 pm
The subsystem ports must all have the same sample time, and the internal subsystem sample times should not be lower than

Last post by mamorani « Sun Mar 14, 2021 12:13 pm

by mamorani » Sun Mar 14, 2021 12:13 pm

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329 Views

Last post by mamorani
Sun Mar 14, 2021 12:13 pm
Data type ' ' is currently not supported for UVM test bench generation

Last post by mamorani « Sun Mar 14, 2021 12:12 pm

by mamorani » Sun Mar 14, 2021 12:12 pm

0 Replies

310 Views

Last post by mamorani
Sun Mar 14, 2021 12:12 pm
The DUT subsystem is shadowed by a MATLAB function. Rename the subsystem or remove the MATLAB file shadowing the subsys

Last post by mamorani « Sun Mar 14, 2021 12:12 pm

by mamorani » Sun Mar 14, 2021 12:12 pm

0 Replies

344 Views

Last post by mamorani
Sun Mar 14, 2021 12:12 pm
The SystemVerilog package was not found. The generated code might be stale. Delete the code generation folder and regen

Last post by mamorani « Sun Mar 14, 2021 12:10 pm

by mamorani » Sun Mar 14, 2021 12:10 pm

0 Replies

317 Views

Last post by mamorani
Sun Mar 14, 2021 12:10 pm
The shared library ' was not found. This is going to cause issues when trying to run the UVM test bench unless you comp

Last post by mamorani « Sun Mar 14, 2021 12:10 pm

by mamorani » Sun Mar 14, 2021 12:10 pm

0 Replies

324 Views

Last post by mamorani
Sun Mar 14, 2021 12:10 pm
The following subsystems will have name clashes in the generated code: Rename the subsystems above, preferably using cha

Last post by mamorani « Sun Mar 14, 2021 12:09 pm

by mamorani » Sun Mar 14, 2021 12:09 pm

0 Replies

302 Views

Last post by mamorani
Sun Mar 14, 2021 12:09 pm
Duplicate Simulink subsystems were detected. The sequence, dut and scoreboard need to be different

Last post by mamorani « Sun Mar 14, 2021 12:09 pm

by mamorani » Sun Mar 14, 2021 12:09 pm

0 Replies

300 Views

Last post by mamorani
Sun Mar 14, 2021 12:09 pm
Feedback loops are currently not supported

Last post by mamorani « Sun Mar 14, 2021 12:08 pm

by mamorani » Sun Mar 14, 2021 12:08 pm

0 Replies

315 Views

Last post by mamorani
Sun Mar 14, 2021 12:08 pm
DUT subsystem should be directly connected to scoreboard subsystem. Check the order of the input arguments

Last post by mamorani « Sun Mar 14, 2021 12:06 pm

by mamorani » Sun Mar 14, 2021 12:06 pm

0 Replies

333 Views

Last post by mamorani
Sun Mar 14, 2021 12:06 pm
Sequence subsystem should be directly connected to DUT subsystem. Check the order of the input arguments. The specified

Last post by mamorani « Sun Mar 14, 2021 12:05 pm

by mamorani » Sun Mar 14, 2021 12:05 pm

0 Replies

329 Views

Last post by mamorani
Sun Mar 14, 2021 12:05 pm
Sequence subsystem should be directly connected to DUT subsystem. Check the order of the input arguments. The specified

Last post by mamorani « Sun Mar 14, 2021 12:03 pm

by mamorani » Sun Mar 14, 2021 12:03 pm

0 Replies

329 Views

Last post by mamorani
Sun Mar 14, 2021 12:03 pm
Sequence subsystem should be directly connected to DUT subsystem. Check the order of the input arguments

Last post by mamorani « Sun Mar 14, 2021 12:02 pm

by mamorani » Sun Mar 14, 2021 12:02 pm

0 Replies

325 Views

Last post by mamorani
Sun Mar 14, 2021 12:02 pm
argument must be a full subsystem name or a handle to a subsystem

Last post by mamorani « Sun Mar 14, 2021 12:02 pm

by mamorani » Sun Mar 14, 2021 12:02 pm

0 Replies

313 Views

Last post by mamorani
Sun Mar 14, 2021 12:02 pm
Duplicate VCD file . The "VCD file name" parameters specified in and ' resolve to the same file. VCD file names specif

Last post by mamorani « Sun Mar 14, 2021 12:00 pm

by mamorani » Sun Mar 14, 2021 12:00 pm

0 Replies

316 Views

Last post by mamorani
Sun Mar 14, 2021 12:00 pm
Duplicate VCD file . The "VCD file name" parameters specified in and ' resolve to the same file. VCD file names specif

Last post by mamorani « Sun Mar 14, 2021 12:00 pm

by mamorani » Sun Mar 14, 2021 12:00 pm

0 Replies

278 Views

Last post by mamorani
Sun Mar 14, 2021 12:00 pm
User-defined signal name conflicts with auto-name provided. Please rename one of the user-defined signal names

Last post by mamorani « Sun Mar 14, 2021 11:58 am

by mamorani » Sun Mar 14, 2021 11:58 am

0 Replies

286 Views

Last post by mamorani
Sun Mar 14, 2021 11:58 am

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