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The Constant High Z implementation cannot be used with a floating point output datatype

Last post by mamorani « Fri Mar 12, 2021 5:30 pm

by mamorani » Fri Mar 12, 2021 5:30 pm

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Last post by mamorani
Fri Mar 12, 2021 5:30 pm
The Direct Lookup Table (n-D) may only output a single element for HDL code generation.

Last post by mamorani « Fri Mar 12, 2021 5:29 pm

by mamorani » Fri Mar 12, 2021 5:29 pm

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199 Views

Last post by mamorani
Fri Mar 12, 2021 5:29 pm
The enable or trigger port of an enabled/triggered subsystem may not have its output turned on for HDL code generation

Last post by mamorani « Fri Mar 12, 2021 5:29 pm

by mamorani » Fri Mar 12, 2021 5:29 pm

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Last post by mamorani
Fri Mar 12, 2021 5:29 pm
HDL code generation for the block does not support out-of-range inputs. Set the "Action for out of range input" block pa

Last post by mamorani « Fri Mar 12, 2021 5:29 pm

by mamorani » Fri Mar 12, 2021 5:29 pm

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Last post by mamorani
Fri Mar 12, 2021 5:29 pm
only one input port is possible in ''Value and Index'' mode in

Last post by mamorani « Fri Mar 12, 2021 5:28 pm

by mamorani » Fri Mar 12, 2021 5:28 pm

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Last post by mamorani
Fri Mar 12, 2021 5:28 pm
Require all inputs to have the same data type" must be selected on the Lookup Table (n-D) for HDL code generation

Last post by mamorani « Fri Mar 12, 2021 5:28 pm

by mamorani » Fri Mar 12, 2021 5:28 pm

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Last post by mamorani
Fri Mar 12, 2021 5:28 pm
Use one input port for all data" must be unchecked on the Lookup Table (n-D) for HDL code generation.

Last post by mamorani « Fri Mar 12, 2021 5:25 pm

by mamorani » Fri Mar 12, 2021 5:25 pm

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213 Views

Last post by mamorani
Fri Mar 12, 2021 5:25 pm
Tried to parse a cell array of implementation parameters with an odd number of elements; dropping last element.

Last post by mamorani « Fri Mar 12, 2021 5:25 pm

by mamorani » Fri Mar 12, 2021 5:25 pm

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225 Views

Last post by mamorani
Fri Mar 12, 2021 5:25 pm
Multiple DocBlocks are not support for HDL code generation in BlackBox ''. Use exactly one per target language

Last post by mamorani « Fri Mar 12, 2021 5:24 pm

by mamorani » Fri Mar 12, 2021 5:24 pm

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232 Views

Last post by mamorani
Fri Mar 12, 2021 5:24 pm
DocBlock is supported for custom IP HDL code generation only when embedded in a BlackBox subsystem

Last post by mamorani « Fri Mar 12, 2021 5:24 pm

by mamorani » Fri Mar 12, 2021 5:24 pm

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281 Views

Last post by mamorani
Fri Mar 12, 2021 5:24 pm
Enter valid HDL code in DocBlock <a href="matlab:open_system hilite_system to proceed with HDL code generation.

Last post by mamorani « Fri Mar 12, 2021 5:23 pm

by mamorani » Fri Mar 12, 2021 5:23 pm

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230 Views

Last post by mamorani
Fri Mar 12, 2021 5:23 pm
DocBlock does not support exact HDL code generation for type . Use ''text'' type instead

Last post by mamorani « Fri Mar 12, 2021 5:23 pm

by mamorani » Fri Mar 12, 2021 5:23 pm

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244 Views

Last post by mamorani
Fri Mar 12, 2021 5:23 pm
Table dimension is not a power of 2. This will generate less efficient hardware.

Last post by mamorani « Fri Mar 12, 2021 5:22 pm

by mamorani » Fri Mar 12, 2021 5:22 pm

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217 Views

Last post by mamorani
Fri Mar 12, 2021 5:22 pm
The breakpoints for dimension of the Lookup Table (n-D) are not evenly spaced

Last post by mamorani « Fri Mar 12, 2021 5:22 pm

by mamorani » Fri Mar 12, 2021 5:22 pm

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Last post by mamorani
Fri Mar 12, 2021 5:22 pm
AllowDistributedPipelining' of is off, but distributed pipelining or constrained distributed pipelining is requested

Last post by mamorani « Fri Mar 12, 2021 5:22 pm

by mamorani » Fri Mar 12, 2021 5:22 pm

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227 Views

Last post by mamorani
Fri Mar 12, 2021 5:22 pm
constructor called with no supported block information

Last post by mamorani « Fri Mar 12, 2021 5:21 pm

by mamorani » Fri Mar 12, 2021 5:21 pm

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211 Views

Last post by mamorani
Fri Mar 12, 2021 5:21 pm
The non-virtual bus setting is ignored for HDL code generation. The bus will be implemented as a set of independent elem

Last post by mamorani « Fri Mar 12, 2021 5:21 pm

by mamorani » Fri Mar 12, 2021 5:21 pm

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249 Views

Last post by mamorani
Fri Mar 12, 2021 5:21 pm
Non-unique property name in implementation parameters

Last post by mamorani « Fri Mar 12, 2021 5:21 pm

by mamorani » Fri Mar 12, 2021 5:21 pm

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210 Views

Last post by mamorani
Fri Mar 12, 2021 5:21 pm
All DSP Builder I/O blocks must be in the top level of the Altera subsystem

Last post by mamorani « Fri Mar 12, 2021 5:20 pm

by mamorani » Fri Mar 12, 2021 5:20 pm

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210 Views

Last post by mamorani
Fri Mar 12, 2021 5:20 pm
HDL code generation is not supported for non top level DUT with bus element ports .

Last post by mamorani « Fri Mar 12, 2021 5:20 pm

by mamorani » Fri Mar 12, 2021 5:20 pm

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217 Views

Last post by mamorani
Fri Mar 12, 2021 5:20 pm
Subsystem output port must have an initial value of 0 for HDL code generation when in a subsystem with a Trigger or Ena

Last post by mamorani « Fri Mar 12, 2021 5:19 pm

by mamorani » Fri Mar 12, 2021 5:19 pm

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363 Views

Last post by mamorani
Fri Mar 12, 2021 5:19 pm
Doc block comments can only be added to HDL files when Document Type is Text, not when it is

Last post by mamorani « Fri Mar 12, 2021 5:19 pm

by mamorani » Fri Mar 12, 2021 5:19 pm

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213 Views

Last post by mamorani
Fri Mar 12, 2021 5:19 pm
Please use native floating mode for floating point inputs for the reciprocal square root block with SqrtFunction archite

Last post by mamorani « Fri Mar 12, 2021 5:18 pm

by mamorani » Fri Mar 12, 2021 5:18 pm

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226 Views

Last post by mamorani
Fri Mar 12, 2021 5:18 pm
SqrtBitset implementation for square-root is not supported in native floating-point mode. For HDL code generation in nat

Last post by mamorani « Fri Mar 12, 2021 5:18 pm

by mamorani » Fri Mar 12, 2021 5:18 pm

0 Replies

214 Views

Last post by mamorani
Fri Mar 12, 2021 5:18 pm
After HDL code generation, Reciprocal Sqrt block can have numeric differences when compared to the Simulink model. Set t

Last post by mamorani « Fri Mar 12, 2021 5:17 pm

by mamorani » Fri Mar 12, 2021 5:17 pm

0 Replies

255 Views

Last post by mamorani
Fri Mar 12, 2021 5:17 pm

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