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is used by simulation and requires reset be asserted for at least 100 ns. However, the current test bench settings only

Posted: Sun Mar 14, 2021 9:02 pm
by mamorani
is used by simulation and requires reset be asserted for at least 100 ns. However, the current test bench settings only assert reset for ns, i.e. (ClockHighTime + ClockLowTime) * ResetLength. It is recommended to increase ResetLength to extend the reset time.

hdlshared