Found Inport at the root-level of the generated model. Input port is not supported by SystemVerilog DPI testbench
Posted: Sat Mar 13, 2021 11:24 pm
Found Inport at the root-level of the generated model. Input port is not supported by SystemVerilog DPI testbench
GenerateSVDPITestbench
GenerateSVDPITestbench