Using interface with Ready port unassigned is not supported when "Minimize clock enables" is in effect, or when top-leve

Post Reply
mamorani
Posts: 8800
Joined: Thu Feb 25, 2021 6:50 pm
Contact:

Using interface with Ready port unassigned is not supported when "Minimize clock enables" is in effect, or when top-leve

Post by mamorani »

Using interface with Ready port unassigned is not supported when "Minimize clock enables" is in effect, or when top-level HDL code contains clock port but does not contain clock enable port.


workflow
Post Reply

Return to “Signal Processing”

Who is online

Users browsing this forum: No registered users and 1 guest