A resettable timing controller is not supported with FPGA-in-the-loop. To correct this issue, run ''hdlset_param( ''Tim
Posted: Fri Mar 12, 2021 8:35 pm
A resettable timing controller is not supported with FPGA-in-the-loop. To correct this issue, run ''hdlset_param( ''TimingControllerArch'', ''default'')'
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