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You can generate MATLAB code that will automate the generation of synthesizable VHDL and Verilog code along with test be

Posted: Wed Mar 10, 2021 5:02 pm
by mamorani
You can generate MATLAB code that will automate the generation of synthesizable VHDL and Verilog code along with test benches for fixed-point filters. Go to the ''Targets'' menu and select ''Generate HDL'' then check ''Generate MATLAB code'

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